| 发明名称 | Routing debug messages | ||
| 摘要 | An integrated circuit chip device comprising: system circuitry; debugging circuitry configured to debug the system circuitry, the debugging circuitry being segmented into zones; wherein the debugging circuitry comprises an interconnect fabric configured to route debug messages through a zone from a zone entry node of the interconnect fabric to a zone exit node of the interconnect fabric; and wherein the debugging circuitry is configured to, on receiving a debug message at a zone entry node that is shorter than a specified length, modify the debug message to form a modified debug message by increasing the length of the debug message to the specified length. | ||
| 申请公布号 | US9424166(B2) | 申请公布日期 | 2016.08.23 |
| 申请号 | US201414251260 | 申请日期 | 2014.04.11 |
| 申请人 | ULTRASOC TECHNOLOGIES LIMITED | 发明人 | Hopkins Andrew Brian Thomas;Robertson Iain Craig |
| 分类号 | G06F11/00;G06F11/36;G01R31/317;G01R31/3177 | 主分类号 | G06F11/00 |
| 代理机构 | Vorys, Sater, Seymour and Pease LLP | 代理人 | Vorys, Sater, Seymour and Pease LLP ;DeLuca Vincent M |
| 主权项 | 1. An integrated circuit chip device comprising: system circuitry; debugging circuitry configured to debug the system circuitry, the debugging circuitry being segmented into zones; wherein the debugging circuitry comprises an interconnect fabric configured to route debug messages through a zone from a zone entry node of the interconnect fabric to a zone exit node of the interconnect fabric; and wherein the debugging circuitry is configured to, on receiving a debug message at a zone entry node that is shorter than a specified length, modify the debug message to form a modified debug message by increasing the length of the debug message to the specified length. | ||
| 地址 | Cambridge GB | ||