| 摘要 |
<p>PURPOSE:To avoid a signal delay in a word line of a masked ROM and to enhance a yield of chips when a large-capacity and high-speed masked ROM is manufactured by a method wherein a redundant memory cell composed of a one-layer gate type EPROM is provided. CONSTITUTION:A control gate is constituted of an impurity region 3 formed by diffusing impurities to a silicon substrate 1. A write voltage which has been applied to an electrode 6 is divided into a floating gate 5 by a gate oxide film 4. As a result, carriers flowing between a source and a drain are injected into the floating gate, stored and written. Accordingly, a polycide can be used for the floating gate 5; since a lower layer constituting the polycide is polysilicon, an insulating layer between the control gate 3 and the floating gate 5 does not come into contact with a silicide; there is no danger that a dielectric breakdown strength and a stored-charge retention characteristic are deteriorated. Thereby, a redundant memory cell can be formed without sacrificing an operating speed of a masked ROM; it is not required to increase the number of manufacturing processes.</p> |
