MEMORY UNIT, SRAM CELL, AND DATA TRANSFER METHOD

摘要

PROBLEM TO BE SOLVED: To rapidly process massive data, by providing an SRAM, DRAMs and two external IO ports, providing two IO ports connected to the external ports and the IO port bidirectionally transferring the data between with the DRAM in the SRAM and executing read-out and write-in for the DRAM parallel to the read-out and write-in from the outside with the SRAM. SOLUTION: The dram consists of four 4 M bits memory banks respectively constituted of 512 rows×32 columns×256 bits. The SRAM consists of 4 K bits constituted of 16 lines×16 word×16 bits to transfer the 16 bits data between with the IO data pins 18, 20 of the external ports A, B through two SRAM ports corresponding to respective data pins. Two SRAM ports can access independently and simultaneously even any location in the SRAM 16. They can transfer simultaneously and parallel a 256 bits data block in between with the DRAMs 12 through a global input/output bus.