| 发明名称 |
ESTIMATING AN ERROR RATE ASSOCIATED WITH MEMORY |
| 摘要 |
The present disclosure includes apparatuses and methods for estimating an error rate associated with memory. A number of embodiments include sensing data stored in a memory, performing an error detection operation on the sensed data, determining a quantity of parity violations associated with the error detection operation, and estimating an error rate associated with the memory based on the determined quantity of parity violations. |
| 申请公布号 |
US2016218740(A1) |
申请公布日期 |
2016.07.28 |
| 申请号 |
US201514607206 |
申请日期 |
2015.01.28 |
| 申请人 |
Micron Technology, Inc. |
发明人 |
Parthasarathy Sivagnanam;Kaynak Mustafa N.;Khayat Patrick R.;Richardson Nicholas J. |
| 分类号 |
H03M13/11;G06F11/07 |
主分类号 |
H03M13/11 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for operating memory, comprising:
sensing data stored in a memory; performing an error detection operation on the sensed data; determining a quantity of parity violations associated with the error detection operation; and estimating an error rate associated with the memory based on the determined quantity of parity violations. |
| 地址 |
Boise ID US |
