Flash storage device and method including separating write data to correspond to plural channels and arranging the data in a set of cache spaces

摘要

A data storage device with a FLASH memory accessed via multiple channels and a FLASH memory control method are disclosed. The control method includes dividing a plurality of blocks of a FLASH memory into groups to be accessed by a plurality of channels separately, each block comprising a plurality of pages; allocating a random access memory to provide a first set of cache spaces for the different ones of the plurality of channels; separating write data issued from a host to correspond to the plurality of channels; and after data arrangement in the first set of cache spaces for every channel is completed, writing data arranged in the first set of cache spaces for every channel to the FLASH memory via the plurality of channels. The control method further includes allocating the random access memory to provide a second set of cache spaces; and using the second set of cache spaces to perform data arrangement for the write data issued from the host when writing the data arranged in the first set of cache spaces for every channel to the FLASH memory.

主权项

1. A data storage device, comprising:
a FLASH memory, comprising a plurality of blocks each with a plurality of pages, wherein the blocks are further grouped to be accessed by a plurality of channels separately; and a controller coupled to the FLASH memory, comprising: a computing unit; a read only memory, loaded with programs to be executed by the computing unit to build firmware for the data storage device; and a random access memory, allocated according to the computing unit executing the firmware to provide a first set of cache spaces, wherein different cache spaces within the first set of cache spaces correspond to different ones of the plurality of channels, respectively, and every channel corresponds to one cache space of the first set of cache spaces, wherein: the computing unit separates write data issued from a host to correspond to the plurality of channels and, after data arrangement that combines non-refreshed data with write data in the first set of cache spaces for every channel is completed, the computing unit writes data arranged in the first set of cache spaces for every channel to the FLASH memory via the plurality of channels; the computing unit further allocates the random access memory to provide a second set of cache spaces, and different cache spaces within the second set of cache spaces correspond to the different ones of the plurality of channels, respectively and every channel corresponds to one cache space of the second set of cache spaces; and when writing the data arranged in the first set of cache spaces for every channel to the FLASH memory, the computing unit uses the second set of cache spaces to perform data arrangement for the write data issued from the host.