发明名称 |
Error detection and correction scheme for a memory device |
摘要 |
Data is read from a memory array. Before being stored in a data buffer, a Hamming code detection operation and a Reed-Solomon code detection operation are operated in parallel to determine if the data word has any errors. The results of the parallel detection operations are communicated to a controller circuit. If an error is present that can be corrected by the Hamming code correction operation, this is performed and the Reed-Solomon code detection operation is performed on the corrected word. If the error is uncorrectable by the Hamming code, the Reed-Solomon code correction operation is performed on the word.
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申请公布号 |
US2005172207(A1) |
申请公布日期 |
2005.08.04 |
申请号 |
US20040769001 |
申请日期 |
2004.01.30 |
申请人 |
RADKE WILLIAM H.;SWAMINATHAN SHUBA;KEAYS BRADY L. |
发明人 |
RADKE WILLIAM H.;SWAMINATHAN SHUBA;KEAYS BRADY L. |
分类号 |
G06F11/10;H03M13/29;(IPC1-7):G11C29/00 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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