发明名称 |
PFET WITH TAILORED DIELECTRIC AND RELATED METHODS AND INTEGRATED CIRCUIT |
摘要 |
A PFET having tailored dielectric constituted in part by an NFET threshold voltage (Vt) work function tuning layer in a gate stack thereof, related methods and integrated circuit are disclosed. In one embodiment, the PFET includes an n-type doped silicon well (N-well), a gate stack including: a doped band engineered PFET threshold voltage (Vt) work function tuning layer over the N-well; a tailored dielectric layer over the doped band engineered PFET Vt work function tuning layer, the tailored dielectric layer constituted by a high dielectric constant layer over the doped band engineered PFET Vt work function tuning layer and an n-type field effect transistor (NFET) threshold voltage (Vt) work function tuning layer over the high dielectric constant layer; and a metal over the NFET Vt work function tuning layer.
|
申请公布号 |
US2009152637(A1) |
申请公布日期 |
2009.06.18 |
申请号 |
US20070955491 |
申请日期 |
2007.12.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;ADVANCED MICRO DEVICES, INC. (AMD) |
发明人 |
CARTER RICK;CHUDZIK MICHAEL P.;JHA RASHMI;MOUMEN NAIM |
分类号 |
H01L27/00;H01L21/8238 |
主分类号 |
H01L27/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|