| 摘要 |
PURPOSE:To acquire the output of a voltage level signal larger than the driving power voltage by controlling the operation of a high potential FET by means of a drive signal whose voltage level is shifted to a level equal to the back gate voltage. CONSTITUTION:A level shifter 23 converts the signal of voltage level VSS supplied from an AND gate 21 into a signal of HV level higher than the logic gate driving power voltage VL and supplies this signal to the gate terminal of an FET 24. The driver output voltage VDD of a high potential is applied to the drain terminal of the FET 24, and the driver output voltage VSS of a low potential is applied to the source terminal of an FET 26. Then the FET 24 performs a switching operation by the output HV of the shifter 23 or a drive signal of voltage level VSS (HV<VSS). Therefore the voltage of the HV level is applied to the back gate of the shifter 23. As the source terminal of the FET 24 is connected to the drain terminal of the FET 26, the driver output is acquired at a junction Q between both terminals. |
