发明名称
摘要 <p>PURPOSE:To provide the process for production which decreases mask alignment stages in the production of the integrated circuit on an insulating substrate and to enhance the reliability of the resulted integrated circuit and to improve the yield. CONSTITUTION:The surfaces of the gate electrode 106, first metallic wiring, such as wiring, etc., formed on the thin-film-like semiconductor element having multilayered wirings, such as thin-film transistors, formed on the insulating substrate 101 are anodized, by which an insulating film 109 is formed on these surfaces and an interlayer insulator is formed directly or separately thereof and thereafter, source and drain electrodes or second metallic wirings 110, 111, such as wirings, are formed.</p>
申请公布号 JP2781706(B2) 申请公布日期 1998.07.30
申请号 JP19920275396 申请日期 1992.09.19
申请人 发明人
分类号 G02F1/136;G02F1/1343;G02F1/1368;G09F9/30;H01L21/02;H01L21/28;H01L21/336;H01L21/768;H01L21/84;H01L23/52;H01L27/088;H01L27/12;H01L29/78;H01L29/786;(IPC1-7):G02F1/136;G02F1/134 主分类号 G02F1/136
代理机构 代理人
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