| 摘要 |
PROBLEM TO BE SOLVED: To provide a binarization circuit which is high in robust performance to unknown offset variation components, and capable of coping with even frequency variation.SOLUTION: A binarization circuit includes: a hold circuit part (101) for detecting the peak value and bottom value of an input signal as an analog input signal; a threshold formation circuit for determining a threshold on the basis of the peak value and bottom value to be output from the hold circuit part (101); hold state detection circuits (200, 300) for detecting on or off of the hold state of the hold circuit part (101) from the states of the input signal, the peak value and the bottom value; a reset timing generation circuit part (104) for generating a reset signal on the basis of the on or off of the hold state of the hold circuit part (101) detected by the hold state detection circuits (200, 300); and a comparison circuit part (105) for comparing the input signal with the threshold to output a binarized signal. The hold circuit part (101) resets the peak value or bottom value on the basis of the reset signal.SELECTED DRAWING: Figure 1 |
