发明名称 Integrated downscale in video core
摘要 Implementations include video image processing systems, methods, and apparatus for integrated video downscale in a video core. The downscaler computes and writes a display frame to an external memory. This frame may have the same resolution as a target display device (e.g., mobile device). The target display device then reads this display frame, rather than the original higher resolution frame. By enabling downscale during encoding/decoding, the device can conserve resources such as memory bandwidth, memory access, bus bandwidth, and power consumption associated with separately downscaling a frame of video data.
申请公布号 US9432614(B2) 申请公布日期 2016.08.30
申请号 US201313801220 申请日期 2013.03.13
申请人 QUALCOMM Incorporated 发明人 Ge Feng;Lalgudi Hariharan G.;Mohan Sumit;Wang Kai;Malayath Narendranath
分类号 H04N19/00;H04N7/01;H04N19/42;H04N19/59;H04N19/33 主分类号 H04N19/00
代理机构 Knobbe Martens Olson & Bear LLP 代理人 Knobbe Martens Olson & Bear LLP
主权项 1. An electronic device for processing video data, the device comprising: a receiver configured to receive input video data; and a video coder configured to generate output video data, the video coder including: a video encoder;a video decoder;the video encoder and the video decoder each comprising a deblocker arranged to generate deblocked video data; anda downscaler coupled with the deblocker of each of the video encoder and the video decoder, wherein the downscaler is coupled with each deblocker to receive the deblocked video data, and wherein the downscaler is configured to generate a downscaled version of the deblocked video data received from either the video encoder or the video decoder during encoding or decoding based on scaling configuration of a target display device, wherein the output video data includes the downscaled version of the input video data.
地址 San Diego CA US