PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE

摘要

A semiconductor package includes terminals, each having an exposed surface that is flush with a bottom surface of the semiconductor package, and a layer of interconnection routings disposed within the semiconductor package. At least one interconnection routing is electrically coupled with a terminal and extends planarly therefrom. The semiconductor package also includes at least one die coupled with the layer of interconnection routings. In some embodiments, the semiconductor package also includes one or more additional intermediary layers. Each intermediary layer includes a via layer and an associated routing layer. The associated routing layer includes associated routings. At least one associated routing is electrically coupled with a terminal and extends planarly therefrom. Each via layer couples two routing layers. The semiconductor package also includes a locking mechanism for fastening a package compound with the interconnection routings and the terminals.

主权项

1. A semiconductor package comprising:
a. a die; b. terminals, each terminal including an exposed surface that is flush with a bottom surface of the semiconductor package; c. a primary interconnection routing layer coupling with the die and including primary interconnection routings; d. an intermediary layer including vias and an associate interconnection routing layer that couples with the vias and that includes associate interconnection routings; and e. a package compound including:
i. a top molding compound encapsulating the primary interconnection routings and the die;ii. an intermediary molding compound surrounding the associate interconnection routings and the vias; andiii. a bottom molding compound surrounding the terminals, wherein at least one of the associate interconnection routings includes catalytic ink on the bottom molding compound, around a perimeter of one of the terminals and extends planarly away from the one of the terminals.