发明名称 Spatio-temporal tunable pixels ROIC for multi-spectral imagers
摘要 Provided is a readout integrated circuit (ROIC). The ROIC includes a memory for each of a plurality of pixels, an address selector to synchronize a subsequent bias voltage for each of the pixels, a reference voltage recover switch to subtract the initial bias voltage from an output voltage of the integrated circuit and to result an integrator voltage for a sample and hold block, and a pulse-width control circuit to prevent crosstalk of the subsequent bias voltage between first and second ones of the pixels while a pixel clock selects adjacent columns. The memory maintains an initial bias voltage for each pixel during an initial integration frame time and during a sample and hold readout processing time. The sample and hold readout processing time is utilized to write a subsequent bias voltage for each pixel for a subsequent integration frame time to allow the first one of the pixels to have a different bias voltage than the second one of the pixels inside each integration frame time.
申请公布号 US9521346(B1) 申请公布日期 2016.12.13
申请号 US201514625391 申请日期 2015.02.18
申请人 STC.UNM 发明人 Cugler-Fiorante Glauco Rogerio;Zarkesh-Ha Payman;Krishna Sanjay
分类号 H01L27/00;H04N5/378;H01L27/146;H01L27/144 主分类号 H01L27/00
代理机构 MH2 Technology Law Group LLP 代理人 MH2 Technology Law Group LLP
主权项 1. A readout integrated circuit, comprising: a memory for each of a plurality of pixels, wherein the memory maintains an initial bias voltage for each pixel during an initial integration frame time and during a sample and hold readout processing time, and wherein the sample and hold readout processing time is utilized to write a subsequent bias voltage for each pixel for a subsequent integration frame time to allow a first one of the pixels to have a different bias voltage than a second one of the pixels inside each integration frame time; an address selector to synchronize a subsequent bias voltage for each of the pixels; a reference voltage recover switch to subtract the initial bias voltage from an output voltage of the integrated circuit, and to result an integrator voltage for a sample and hold block; and a pulse-width control circuit to prevent crosstalk of the subsequent bias voltage between the first and second pixels while a pixel clock selects adjacent columns.
地址 Albuquerque NM US