| 摘要 |
A dual feedback low noise amplifier includes a negative-feedback capacitive mutual-coupled common-gate amplifier of parallel-input parallel-output (PIPO) composed of a first transistor, a second transistor, a first coupling capacitor and a second coupling capacitor and a positive-feedback common-gate amplifier of parallel-input parallel-output (PIPO) composed of the first transistor, the second transistor, a first transformer and a second transformer. By means of dual feedback, the transconductance gain of the dual feedback low noise amplifier is increased, and the noise figure of the dual feedback low noise amplifier is decreased. |
| 主权项 |
1. A dual feedback low noise amplifier includes:
a first transistor having a first terminal, a second terminal and a third terminal; a second transistor having a fourth terminal, a fifth terminal and a sixth terminal; a first coupling capacitor, wherein one end of the first coupling capacitor connects to the second terminal of the first transistor, and the other end of the first coupling capacitor connects to the fourth terminal of the second transistor; a second coupling capacitor, wherein one end of the second coupling capacitor connects to the first terminal of the first transistor, and the other end of the second coupling capacitor connects to the fifth terminal of the second transistor; a first transformer having a first secondary inductor and a first primary inductor, wherein one end of the first secondary inductor connects to a ground terminal, the other end of the first secondary inductor connects to the second terminal of the first transistor, one end of the first primary inductor connects to a voltage terminal, and the other end of the first primary inductor connects to the third terminal of the first transistor; a second transformer having a second secondary primary inductor and a second primary inductor, wherein one end of the second secondary inductor connects to the ground terminal, the other end of the second secondary inductor connects to the fifth terminal of the second transistor, one end of the second primary inductor connects to the voltage terminal, and the other end of the second primary inductor connects to the sixth terminal of the second transistor, and, a first peaking inductor and a second peaking inductor, the first peaking inductor connects to the third terminal of the first transistor, the second peaking inductor connects to the sixth terminal of the second transistor, wherein a parallel/series peaking network is composed of the first peaking inductor and the first primary inductor, and the other parallel/series peaking network is composed of the second peaking inductor and the second primary inductor. |
