Implementation of a One Time Programmable Memory Using a MRAM Stack Design

摘要

An integrated circuit includes a magnetic OTP memory array formed of multiple magnetic OTP memory cells having an MTJ stack with a fixed magnetic layer, a tunnel barrier insulating layer, a free magnetic layer, and a second electrode. When a voltage is applied across the magnetic OTP memory cell, the resistance of the MTJ stack and the gating transistor form a voltage divider to apply a large voltage across the MTJ stack to breakdown the tunnel barrier to short the fixed layer to the free layer. The integrated circuit has multiple MRAM arrays configured such that each of the multiple MRAM arrays have performance and density criteria that match MOS transistor based memory including SRAM, DRAM, and flash memory. The integrated circuit may include a functional logic unit connected with the magnetic OTP memory arrays and the MRAM arrays for providing digital data storage.

主权项

1. A magnetic one-time-programmable memory cell comprising:
a magnetic tunnel junction (MTJ) device comprising a fixed magnetic layer fabricated on a first electrode, a tunnel barrier insulating layer fabricated upon the fixed magnetic layer, a free magnetic layer fabricated on the tunnel barrier insulating layer, and a second electrode fabricated on the free magnetic layer, wherein a diameter of the MTJ device is chosen such that the tunnel barrier insulating is broken down by a program voltage applied across the magnetic one-time-programmable memory cell that is a write voltage for an MRAM cell; and a gating metal oxide semiconductor (MOS) transistor serially connected to the MTJ device.