发明名称 MEMORY ACCESS CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enable a data processor to efficiently access continuous data stored in a plurality of memory banks. SOLUTION: A data transfer request issued from the data processor to a synchronous memory is divided, by a burst transfer length unit request dividing section 11a, into a plurality of data transfer requests in which a data transfer amount can be simultaneously burst-transferred and in which a data amount to be transferred simultaneously are equal to a data amount within a single memory bank. The divided data transfer requests are assembled, by a request assembly section 111b, into data transfer request in which data transfer requests to the memory banks are combined one by one, and outputted as a plurality of new data transfer requests. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006268801(A) 申请公布日期 2006.10.05
申请号 JP20050090139 申请日期 2005.03.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OKAJIMA KAZUNORI;TOMITA YASUYUKI;KAITA KUNIHIRO
分类号 G06F12/06;G06F12/00;G06F12/02 主分类号 G06F12/06
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