发明名称 Resistive memory arrangement
摘要 Provided is a resistive memory arrangement having a cell array structured in rows and columns and having resistive memory cells connected to a drive element for driving. Each drive element is jointly connected to n cell resistors forming a memory cell, the cell resistors being CBRAM resistance elements, in particular, and also to a writing, reading and erasing method for a resistive memory arrangement realized with CBRAM resistance elements.
申请公布号 US7215568(B2) 申请公布日期 2007.05.08
申请号 US20050215443 申请日期 2005.08.30
申请人 INFINEON TECHNOLOGIES AG 发明人 LIAW CORVIN;ROEHR THOMAS;KUND MICHAEL
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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