Semiconductor device including power and logic devices and related fabrication methods

摘要

Semiconductor device structures and related fabrication methods are provided. An exemplary fabrication method involves forming a layer of gate electrode material overlying a semiconductor substrate, forming a layer of masking material overlying the gate electrode material, and patterning the layer of masking material to define a channel region within a well region in the semiconductor substrate that underlies the gate electrode material. Prior to removing the patterned layer of masking material, the fabrication process etches the layer of gate electrode material to form a gate structure overlying the channel region using the patterned layer of masking material as an etch mask and forms extension regions in the well region using the patterned layer of masking material as an implant mask. Thereafter, the patterned layer of masking material is removed after forming the gate structure and the extension regions.

主权项

1. A method of fabricating one or more semiconductor devices on a semiconductor substrate, the method comprising:
forming a layer of gate electrode material overlying the semiconductor substrate; forming a layer of masking material overlying the gate electrode material; patterning the layer of masking material to define a channel region within a well region in the semiconductor substrate by removing portions of the layer of masking material to obtain a portion of masking material overlying the channel region, whereinthe well region underlies the gate electrode material,said patterning the layer of masking material comprises removing portions of the layer of masking material to obtain a portion of masking material overlying the channel region;
prior to removing the patterned layer of masking material:etching the layer of gate electrode material to form a gate structure vertically aligned with the portion of masking material overlying the channel region, andimplanting ions into the well region using the portion of masking material as an implant mask to form extension regions having internal lateral boundaries vertically aligned with the gate structure in the well region, prior to said etching the layer of gate electrode material, andreducing a width of the portion of the masking material after said forming the extension regions and before said etching the layer of gate electrode material; and
removing the patterned layer of masking material after forming the gate structure and the extension regions.