发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 The present invention provides a data transmission method capable of suppressing degradation in data rate while improving a bit error rate of transmission data, and transmitters and receivers employed in the data transmission method. On the transmitting side, a CRC bit is added to an input information bit sequence in block units. The information bit sequence subsequent to the addition of the CRC bit is modulated and transmitted to the receiving side. On the receiving side, the information bit sequence is received and demodulated. A CRC check for the post-demodulation information bit sequence is performed. When the above result of CRC check is found to be negative-acknowledged, a NACK signal is transmitted to the transmitting side. On the transmitting side, when the NACK signal transmitted from the receiving side is received after modulation/transmission of the information bit sequence, the information bit sequence subsequent to the addition of the CRC bit is systematically encoded to generate a first parity bit sequence. The first parity bit sequence is modulated and transmitted to the receiving side. On the receiving side, the first parity bit sequence is received and demodulated. The post-demodulation information bit sequence is subjected to error correction decoding using the demodulated first parity bit sequence.
申请公布号 US2008098276(A1) 申请公布日期 2008.04.24
申请号 US20070848307 申请日期 2007.08.31
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 NAOI TOSHIMICHI
分类号 H03M13/00 主分类号 H03M13/00
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