发明名称 Molded Electronic Package Geometry To Control Warpage And Die Stress
摘要 A method and system are provided for a molded electronic package geometry that enables control of warpage and die stress. A mold tool can be closed to define a space or cavity about a semiconductor die disposed on a substrate. Once the mold tool is closed, a mold material can be applied to the space to produce a mold cap. The mold cap geometry can have a first surface that is in contact with the surface of the substrate and a second surface that is opposite the first surface. The second surface can define a tapered portion of the mold cap in which the larger thickness of the tapered portion of the mold cap is in proximity to the semiconductor die and the smaller thickness of the tapered portion of the mold cap is away from the semiconductor die. The thickness of the tapered portion can vary linearly or non-linearly.
申请公布号 US2016172214(A1) 申请公布日期 2016.06.16
申请号 US201615051216 申请日期 2016.02.23
申请人 Amkor Technology, Inc. 发明人 Baloglu Bora;Watson Jeffrey R.
分类号 H01L21/56;H01L23/31 主分类号 H01L21/56
代理机构 代理人
主权项 1. A method, comprising: placing in a mold tool a substrate, the substrate having a surface and a semiconductor die disposed on the surface; closing the mold tool to define a space about the semiconductor die and about the surface of the substrate; and applying a mold material to at least a portion of the defined space to produce a mold cap having a first surface that is in contact with the surface of the substrate and a second surface that is opposite the first surface, wherein the second surface of the mold cap defines a tapered portion of the mold cap in which the larger thickness of the tapered portion of the mold cap is proximate to the semiconductor die and the smaller thickness of the tapered portion of the mold cap is away from the semiconductor die.
地址 Tempe AZ US