发明名称 |
RESISTANCE CHANGE MEMORY |
摘要 |
According to one embodiment, a resistance change memory includes a semiconductor layer having a first surface in a first direction and a second surface in a second direction crossing the first direction, extending in a third direction crossing the first and second directions, and having first and second portions, a gate electrode covering the first and second surfaces between the first and second portions, a first conductive line connected to the first portion, a resistance change element having first and second terminals, the first terminal connected to the second portion, a second conductive line connected to the second terminal, and a third conductive line connected to the gate electrode. |
申请公布号 |
US2016181319(A1) |
申请公布日期 |
2016.06.23 |
申请号 |
US201615054706 |
申请日期 |
2016.02.26 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TANAKA Chika;NOGUCHI Hiroki;FUJITA Shinobu |
分类号 |
H01L27/22 |
主分类号 |
H01L27/22 |
代理机构 |
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代理人 |
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主权项 |
1. A resistance change memory comprising:
a first semiconductor layer having a first surface in a first direction and a second surface in a second direction crossing the first direction, extending in a third direction crossing the first and second directions, and having first and second portions; a first gate electrode covering the first and second surfaces between the first and second portions; a first conductive line connected to the first portion, and extending in a direction crossing the first and third directions; a first resistance change element having first and second terminals, the first terminal connected to the second portion; a second conductive line connected to the second terminal, and extending in a direction crossing the first and third directions; and a third conductive line connected to the first gate electrode, and extending in a direction crossing the first and second directions, wherein the first and second conductive lines are provided between the first semiconductor layer and the third conductive line. |
地址 |
Minato-ku JP |