| 摘要 |
A high-speed sampling front-end circuit is presented that includes a MDAC sampling network, a reference voltage generator circuit, a comparator array, an operational amplifier, an output short-circuit switch, an adjustable clock duty cycle stabilizer, a status control module and a feedback control module. The circuit features low power, high sampling rate and high input bandwidth of sampling network. The time constant of the MDAC sampling network and the comparator array is precisely matched one another to improve input bandwidth of the sampling network. Sampling capacitors are designed as feedback capacitors and DAC calculation capacitors, thereby the operational amplifier doubles feedback coefficient and features 50% bandwidth and 50% power. The cycle stabilizer is adopted to shorten sampling time and extend amplification phase to greatly improve sampling rate. One input reference voltage tends to simplify the design of the reference voltage generator circuit. The circuit has wide applications in pipelined A/D converters. |
| 主权项 |
1. A high speed sampling front-end circuit including a MDAC sampling network, a comparator array, an operational amplifier, an output short-circuit switch, a clock duty cycle stabilizer, a reference voltage generator circuit, a status control module and a feedback control module, wherein
said MDAC sampling network includes a first branch group, a second branch group, a third branch group and a MDAC sampling switch, and is used for sampling input signals; said comparator array includes (n−1) comparators being connected to one another in parallel, and is used for sampling input signals and generating comparison-based signals through comparison between input signals and threshold voltages, wherein the comparison-based signals and the clock signals from the clock duty cycle stabilizer are used to control the working status of the MDAC sampling network through the status control module; said status control module includes a second-branch group control switch and a third-branch group control switch, and is connected to the MDAC sampling network to control the working status of the MDAC sampling network; said feedback control module is a switch group consisting of feedback control switches being connected in parallel, one end of said feedback control module is connected to an output end of the operational amplifier with the other end being connected to the MDAC sampling network; feedback coefficient of said operational amplifier is k/2n, said operational amplifier is used for equalizing voltages at two ends of the operational amplifier when the clock duty cycle stabilizer is at clock amplification phase; said output short-circuit switch is used for connecting an output end of the operational amplifier to ground when the clock duty cycle stabilizer is at clock sampling phase; said clock duty cycle stabilizer is used for generating clock signals with adjustable duty cycle, that are used to control the working status of the MDAC sampling network, comparator array, output short-circuit switch, status control module and feedback control module; and said reference voltage generator circuit is used for generating a group of reference voltages for the comparator array. |
