发明名称 THINNING/INTERPOLATION CIRCUIT FOR VIDEO SIGNAL
摘要 <p>PURPOSE:To decrease the operating speed of each circuit, to halve a storage capacity of a line memory and to simplify the circuit constitution by implementing simultaneously 2-dimension filter processing and data shift in an thinning circuit for a video signal. CONSTITUTION:A biphase split circuit 3 is provided, which separates video signal for each line at an interval of one picture element to split the video signal into a biphase data and the split biphase data are switched alternately for each line by a changeover circuit 31. One output is inputted to a line memory 32 and the other output is inputted to a line memory 11. An output of the line memory 11 is inputted sequentially to 1st and 2nd delay circuits 12,13 and an output of the delay circuit 13 is inputted to a line memory 14. The output of the line memories and the delay circuits is respectively connected to a multiplier circuit and an output of each multiplier circuit is added by an adder circuit 20 and outputted via an output terminal 24. Thus, each circuit is operated at a low speed clock and the line memories with a small storage capacity are used and simple constitution is adopted for the thinning interpolation circuit while keeping picture quality.</p>
申请公布号 JPH0477074(A) 申请公布日期 1992.03.11
申请号 JP19900185349 申请日期 1990.07.16
申请人 PIONEER ELECTRON CORP 发明人 SHIODA TAKEHIKO;IWAMURA HIROSHI
分类号 H04N7/12;H04N7/24;H04N19/00;H04N19/423;H04N19/426;H04N19/59;H04N19/80;H04N19/85 主分类号 H04N7/12
代理机构 代理人
主权项
地址