| 摘要 |
The input Adata to precharged adder circuit 200 is maintained low during the precharge phase by preventing discharge of the node nAdata in the conditional inversion circuit 325,330,335,340 until the active phase commences. When the active phase commences either selnx or selx is asserted to select either a true or complement output from the conditional inversion circuit. The conditional inversion circuit may be used in front of other precharged data processing circuits, such as barrel shifters (figure 5), and may generally be applied before the first element in a domino logic circuit. |
