发明名称 ESD PROTECTION DEVICE OF HIGH-VOLTAGE CMOS APPLICATION
摘要 PROBLEM TO BE SOLVED: To provide a power MOSFET integrated protection device to which the conventional semiconductor process is applicable by providing for the protective device a thick oxide layer having source and drain regions on a semiconductor substrate and extends from the source region to the drain region on the substrate. SOLUTION: A field oxide drain expanded nMOS(FODENMOS) transistor 10 is disposed on an epitaxial region 16 and has a field oxide region 36a, extending over a part of a drain region 10 from a source expansion region 22. A drain expansion region 24 is disposed in a drain region 20, a gate electrode 40 is disposed on the oxide region 36a. In the ESD event, the voltage of a bond bud 16 rises up to the breakdown voltage of FODENMOS 10 which triggers as a lateral npn to disperse into the ground. The gate electrode 40 is separated from a channel region, and hence no high electric field is formed on the channel region surface.
申请公布号 JPH08321560(A) 申请公布日期 1996.12.03
申请号 JP19960043243 申请日期 1996.02.29
申请人 TEXAS INSTR INC <TI> 发明人 CHIYAABAKA DEYUBUURII;ROI KURIFUTON JIYOONZU ZA SAADO
分类号 H01L27/04;H01L21/822;H01L21/8238;H01L27/02;H01L27/092;H01L29/78;(IPC1-7):H01L21/823 主分类号 H01L27/04
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