发明名称 Integrated circuit package and a method for manufacturing an integrated circuit package
摘要 An integrated circuit package includes a package module including one or more circuit interconnections formed in a carrier, wherein at least one top-side package contact is formed over the top-side of the package module and electrically connected to at least one circuit interconnection of the one or more circuit interconnections and wherein a cavity is formed at the top-side of the package module; a chip disposed in the cavity, the chip including at least one chip front side contact and at least one chip back side contact, wherein the at least one chip front side contact is electrically connected to at least one further circuit interconnection of the one or more circuit interconnections; an electrically conductive structure connecting the at least one top-side package contact to the chip back side contact; and a metallic layer formed over the electrically conductive structure and on the chip back side contact.
申请公布号 US9425116(B2) 申请公布日期 2016.08.23
申请号 US201213656822 申请日期 2012.10.22
申请人 INFINEON TECHNOLOGIES AG 发明人 Meyer-Berg Georg;Daeche Frank
分类号 H01L23/12;H01L21/52;H01L23/50;H01L23/13;H05K1/18;H01L23/538;H01L23/498;H01L23/00;H01L25/065;H05K3/46 主分类号 H01L23/12
代理机构 代理人
主权项 1. An integrated circuit package comprising a package module comprising one or more circuit interconnections formed in a carrier, and a first top-side package contact formed over the top-side of the package module, the package module further comprising a first cavity formed at the top-side of the package module; a chip disposed in the first cavity, the chip comprising a chip front side contact and a chip back side contact; a structured metal disposed over the chip back side contact, the structured metal and the top-side package contact defining a trench; and an electrically conductive structure disposed in the trench and connecting the first top-side package contact to the structured metal.
地址 Neubiberg DE