METHOD AND SYSTEM FOR REDUCING A TIME SKEW BETWEEN TWO POLARITIES OF A DIFFERENTIAL SIGNAL

摘要

A method and system for reducing a time skew between two polarities of a differential signal representing a digital bit stream are provided. The system has a variable delay for inserting a variable time delay into polarities of the differential signal to produce a deskewed signal; a multi-phase clock for generating a number M of clock phases per bit of the digital bit stream for oversampling the deskewed signal into a digital representation of the deskewed signal; a logic circuit for estimating the quality of the digital representation of the deskewed signal; and a means for adjusting the variable delay in response to the estimated quality of the digital representation of the deskewed signal to improve the quality. A corresponding method is also provided.