发明名称 ENHANCED PHASE-LOCKED LOOP (PLL) SYSTEM
摘要 A new structure for phase-locked loop (PLL) system is disclosed. As with conventional PLLs, the present invention consists of phase detection, loop filter and voltage-controlled oscillator units. An alternative phase detection structure, inspired by concepts from adaptive filtering and dynamical systems theory, is presented which substantially enhances the performance of the loop in terms of stability and dynamic performance. Presented phase detection scheme obviates the need for sophisticated loop filters, so much so that a first order filter suffices for most applications. In addition to the normal function of a PLL, the present system directly generates estimates of the amplitude, phase and frequency of the input signal. This feature extends the range of applications of the system beyond well-known applications of PLL in various disciplines of electrical engineering.
申请公布号 WO02091578(A2) 申请公布日期 2002.11.14
申请号 WO2002CA00570 申请日期 2002.04.22
申请人 KARIMI GHARTEMANI, MASOUD 发明人 KARIMI GHARTEMANI, MASOUD
分类号 H03L7/085;H03L7/087 主分类号 H03L7/085
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