High power-factor control circuit and power supply

摘要

An SMPS received a rectified periodic input line voltage and is configure to provide a regulated output. A power switch has a constant turn-on time in a given cycle of the rectified periodic input line voltage. A maximum value of the envelope of peak currents through the power switch is determined and is compared with a reference value, and the power switch turn-on time in the next cycle is adjusted accordingly. The output of the power supply is regulated to a target output value, and the current is in phase with the periodic input line voltage, resulting in a high power factor. No sampling of the line voltage is needed to maintain the high power factor. A controller chip can have as few as five pins. Alternatively, a seven-pin controller chip can have two external resistors for selecting operations in either Boundary Conduction Mode (BCM) or Discontinuous Conduction Mode (DCM).

主权项

1. A controller for controlling a switched mode power supply (SMPS) that is configured to receive a rectified periodic input voltage, the controller comprising:
a first input terminal for receiving information about a current flow through a power switch in the SMPS; a second input terminal for receiving information about an output of the SMPS; and an output terminal for providing a control signal to the power switch of the SMPS for turning on/off of the power switch multiple times in a cycle of the rectified periodic input voltage; wherein the controller is configured to provide a constant power switch turn-on time in a given cycle of the rectified periodic input voltage, and the controller is configured to determine a maximum value of the envelope of peak currents through the power switch in the given cycle, the envelope of peak currents through the power switch being in phase with the rectified periodic input voltage; wherein the controller is configured to maintain a constant output of the SMPS by adjusting the power switch turn-on time for the next cycle of the rectified periodic input voltage based on comparison of a first reference signal with the determined maximum value of the envelope of peak currents through the power switch in the given cycle.