发明名称 |
Delay circuit, oscillation circuit, and semiconductor device |
摘要 |
Provided is a voltage regulator which consumes low power and uses an NMOS transistor as an output transistor. A delay circuit includes, between a constant current circuit and a capacitor, a depletion type NMOS transistor having a gate and a back gate each connected to a ground terminal, the constant current circuit including a depletion type NMOS transistor and a resistor connected between each of a gate and a back gate of the depletion type NMOS transistor and a source thereof. |
申请公布号 |
US9369117(B2) |
申请公布日期 |
2016.06.14 |
申请号 |
US201514976626 |
申请日期 |
2015.12.21 |
申请人 |
SII SEMICONDUCTOR CORPORATION |
发明人 |
Nihei Yotaro;Yokoyama Tomoyuki |
分类号 |
H03K5/12;H03B5/24 |
主分类号 |
H03K5/12 |
代理机构 |
Brinks Gilson & Lione |
代理人 |
Brinks Gilson & Lione |
主权项 |
1. A delay circuit, comprising:
a first NMOS transistor including a source connected to a ground terminal, and a gate to which an input signal is input; a capacitor connected between a drain of the first NMOS transistor and the ground terminal; a constant current circuit configured to cause a current to flow through the capacitor; a first inverter including an input connected to an output terminal of the constant current circuit; a second inverter including an input connected to an output terminal of the first inverter; a first depletion type NMOS transistor including a gate and a back gate each connected to the ground terminal, and a source connected to the drain of the first NMOS transistor; a second NMOS transistor including a source connected to the ground terminal, a drain connected to the output terminal of the constant current circuit, and a gate to which the input signal is input; a third NMOS transistor including a gate connected to the output terminal of the first inverter, a source and a back gate each connected to a drain of the first depletion type NMOS transistor, and a drain connected to the output terminal of the constant current circuit; and a fourth NMOS transistor including a source connected to the ground terminal, a gate connected to an output terminal of the second inverter, and a drain connected to the drain of the first NMOS transistor, the constant current circuit comprising:
a second depletion type NMOS transistor; anda resistor connected between each of a gate and a back gate of the second depletion type NMOS transistor and a source of the second depletion type NMOS transistor. |
地址 |
Chiba JP |