发明名称 Transistor with recess gate and method for fabricating the same
摘要 A transistor including a recessed gate structure having improved doping characteristics and a method for forming such a transistor. The transistor includes a recess in a semiconductor substrate, where the recess is filled with a recessed gate structure including an impurity doped layer and a layer doped with a capture species. The capture species accumulates the impurity and diffuses the impurity to other layers of the recessed gate structure.
申请公布号 US9368586(B2) 申请公布日期 2016.06.14
申请号 US201213719808 申请日期 2012.12.19
申请人 SK Hynix Inc. 发明人 Rouh Kyong-Bong;Eun Yong-Seok;Lee Mi-Ri
分类号 H01L29/40;H01L29/423;H01L21/8238;H01L21/28;H01L21/3215;H01L29/49;H01L29/51 主分类号 H01L29/40
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A method for fabricating a transistor, comprising: forming a recess in a semiconductor substrate; forming a gate dielectric layer over the semiconductor substrate; forming a gate conductive layer including a first undoped silicon layer and a third undoped silicon layer over the gate dielectric layer, the gate conductive layer including an intermediate undoped silicon layer that functions as a capture zone; doping the gate conductive layer with an impurity after the forming of the gate conductive layer, wherein the impurity is accumulated in the capture zone; etching the first undoped silicon layer, a third undoped silicon layer, and the intermediate undoped silicon layer to form a recess gate structure; and diffusing the impurity by performing annealing, wherein the capture zone included in the recess gate structure contains a capture species comprising at least one of carbon or nitrogen to capture the impurity, wherein the first undoped silicon layer and the third undoped silicon layer included in the recess gate structure have the same thickness, wherein the first undoped silicon layer and the intermediate undoped silicon layer included in the recess gate structure are conformally formed not to fill the recess and the third undoped silicon layer included in the recess gate structure is formed over the intermediate undoped silicon layer to fill the recess.
地址 Gyeonggi-do KR