Solid-state image sensor with element isolation regions comprising gaps having reduced variations

摘要

A method of manufacturing a semiconductor device, includes forming a trench in a semiconductor substrate having a first face and a second face by processing the first face of the semiconductor substrate, the trench including a first portion and a second portion located between the first portion and a plane including a first face, filling an insulator in the second portion such that a space remains in the first portion and the trench is closed, and forming a plurality of elements between the first face and the second face, wherein the space and the insulator form element isolation.

主权项

1. A semiconductor device comprising:
a semiconductor substrate having a first face, a second face opposite to the first face, and a trench extending from the first face, the trench including a first portion and a second portion, wherein the second portion is arranged between the first portion and a plane including the first face, and a width of the first portion at a boundary between the first portion and the second portion is smaller than a width of the second portion at the boundary so as to form a step at the boundary; and an insulator arranged in the second portion so as to contact the boundary, wherein a plurality of elements are arranged between the first face and the second face, the plurality of elements including a first semiconductor region of a first conductivity type, wherein a second semiconductor region of a second conductivity type is located between the insulator and the second face so as to contact the insulator at the boundary and to be adjacent to the first semiconductor region, wherein a third semiconductor region of the first conductivity type is located between the first face and the second face, the third semiconductor region having a portion located between the second semiconductor region and the second face in a direction perpendicular to the plane, and wherein a fourth semiconductor region of the second conductivity type is located between the third semiconductor region and the second face.