发明名称 INTEGRATED CIRCUIT (IC) DEVICES INCLUDING STRESS INDUCING LAYERS
摘要 Integrated circuit devices are provided. The devices may include first and second fin-shaped channel regions protruding from a substrate, and the first and second fin-shaped channel regions may define a recess therebetween. The devices may also include an isolation layer in a lower portion of the recess. The isolation layer may include a first stress liner extending along a side of the first fin-shaped channel region, a second stress liner extending along a side of the second fin-shaped channel region and an insulation liner between the first stress liner and the side of the first fin-shaped channel region and between the second stress liner and the side of the second fin-shaped channel region. The devices may further include a gate insulation layer on surfaces of upper portions of the first and second fin-shaped channel regions and a gate electrode layer on the gate insulation layer.
申请公布号 US2016351565(A1) 申请公布日期 2016.12.01
申请号 US201615076952 申请日期 2016.03.22
申请人 SUNG Sug-hyun;YOU Jung-gun;PARK Gi-gwan 发明人 SUNG Sug-hyun;YOU Jung-gun;PARK Gi-gwan
分类号 H01L27/088;H01L29/06;H01L29/78 主分类号 H01L27/088
代理机构 代理人
主权项 1. An integrated circuit device comprising: first and second fin-shaped channel regions protruding from a substrate in a vertical direction, the first and second fin-shaped channel regions defining a recess therebetween; an isolation layer in a lower portion of the recess in a depth direction of the recess, the isolation layer comprising a first stress liner extending along a side of the first fin-shaped channel region, a second stress liner extending along a side of the second fin-shaped channel region and an insulation liner between the first stress liner and the side of the first fin-shaped channel region and between the second stress liner and the side of the second fin-shaped channel region; a gate insulation layer extending along surfaces of upper portions of the first and second fin-shaped channel regions that are exposed by the isolation layer; and a gate electrode layer on the gate insulation layer.
地址 Yongin-si KR