Scheme for masking output of scan chains in test circuit

摘要

Operating a scan chain of a test circuit of an integrated circuit to have either a single fanout or multiple fanout to a compressor. The test circuit receives a fanout control signal for configuring the fanout of the scan chain. If the fanout control signal indicates configuring of the scan chain with a single fanout, the output of the scan chain is sent to one input of a compressor. If the fanout control signal indicates configuring of the scan chain with multiple fanout, the output of the scan chain is sent to multiple inputs of the compressor.

主权项

1. A method for operating a test circuit of an integrated circuit, comprising:
receiving, by the test circuit, a fanout control signal for configuring fanout of a scan chain; responsive to the fanout control signal indicating configuring of the scan chain as a single fanout, sending an output of the scan chain to one input of a compressor for compression; and responsive to the fanout control signal indicating configuring of the scan chain as a multiple fanout, sending the output of the scan chain to three or more inputs of the compressor for compression.