发明名称 WIRING BOARD LAMINATE, SEMICONDUCTOR DEVICE USING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a wiring board laminate that enables the continuity inspection to be performed before a semiconductor chip is mounted, a semiconductor device using the same, and a method of manufacturing the semiconductor device.SOLUTION: A wiring board laminate comprises a supporting body, an adhesive agent layer, a high-resistance conductive layer, and a wiring board. The wiring board has: a conductive layer; two or more resin layers; a first wiring pattern and a second wiring pattern that are provided between the two or more resin layers and separated from each other; a first connection terminal connected with the first wiring pattern; a second connection terminal connected with the second wiring pattern; a first connection pad provided above the conductive layer and connected with the first wiring pattern; and a second connection pad connected with the second wiring pattern. A resistance value rbetween the first connection terminal and the first connection pad, a resistance value rbetween the second connection terminal and the second connection pad, and a resistance value R between the first connection pad and the second connection pad, satisfy r<R, and r<R, and R<10000 Ω.SELECTED DRAWING: Figure 2
申请公布号 JP2016178101(A) 申请公布日期 2016.10.06
申请号 JP20150054711 申请日期 2015.03.18
申请人 TOPPAN PRINTING CO LTD 发明人 FUJITA TAKASHI
分类号 H01L23/15;H05K3/46 主分类号 H01L23/15
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