发明名称 |
Precisely controlling III-V height |
摘要 |
After forming trenches extending through a dielectric material stack including, from bottom to top, a first dielectric layer, a second dielectric layer and a third dielectric layer that is located over a semiconductor substrate, a fin stack of, from bottom to top, an insulating III-V compound material fin portion and a III-V compound semiconductor fin is formed within each trench. The third dielectric layer is removed to expose a first portion of each III-V compound semiconductor fin. After forming a sidewall spacer on sidewalls of the first portion of each III-V compound semiconductor fin, the second dielectric layer is removed to expose a second portion of each III-V compound semiconductor fin. The exposed second portion of each III-V compound semiconductor fin is removed. The remaining first portion of each III-V compound semiconductor fin constitutes an active portion over which a FinFET is subsequently formed. |
申请公布号 |
US9466690(B1) |
申请公布日期 |
2016.10.11 |
申请号 |
US201614994738 |
申请日期 |
2016.01.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Balakrishnan Karthik;Cheng Kangguo;Hashemi Pouya;Reznicek Alexander |
分类号 |
H01L21/76;H01L29/66;H01L29/78;H01L21/768;H01L21/306;H01L21/311 |
主分类号 |
H01L21/76 |
代理机构 |
Scully, Scott, Murphy & Presser, P.C. |
代理人 |
Scully, Scott, Murphy & Presser, P.C. ;Percello, Esq. Louis J. |
主权项 |
1. A semiconductor structure comprising:
a fin stack of, from bottom to top, an insulating III-V compound material fin portion and an embedded III-V compound semiconductor fin portion located over a semiconductor substrate and laterally surrounded by a dielectric layer; an insulator portion located over the dielectric layer and the embedded III-V compound semiconductor fin portion; and a channel III-V compound semiconductor fin portion located over the insulator portion. |
地址 |
Armonk NY US |