发明名称 Multiple Shielding Trench Gate FET
摘要 A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The trenches have field plates under the gate; the field plates are adjacent to the drift region and have a plurality of segments. A dielectric liner in the trenches separating the field plates from the drift region has a thickness great than a gate dielectric layer between the gate and the body. The dielectric liner is thicker on a lower segment of the field plate, at a bottom of the trenches, than an upper segment, immediately under the gate. The trench gate may be electrically isolated from the field plates, or may be connected to the upper segment. The segments of the field plates may be electrically isolated from each other or may be connected to each other in the trenches.
申请公布号 US2016329423(A1) 申请公布日期 2016.11.10
申请号 US201615049209 申请日期 2016.02.22
申请人 Texas Instruments Incorporated 发明人 Kawahara Hideaki;Sridhar Seetharaman;Kocon Christopher Boguslaw;Molloy Simon John;Yang Hong
分类号 H01L29/78;H01L29/06;H01L29/66;H01L29/40 主分类号 H01L29/78
代理机构 代理人
主权项 1. An integrated circuit, comprising: a vertical metal oxide semiconductor transistor including: a vertical drift region;a body region positioned above the vertical drift regiona trench defined vertically into the body region and the vertical drift region;a trench gate positioned in the trench and adjacent to the body region;a field plate positioned in the trench and adjacent to the vertical drift region;a first dielectric liner disposed on a sidewall of the trench and separating the field plate from the vertical drift region, the first dielectric liner having a first thickness; anda second dielectric liner disposed on the sidewall and positioned above the first dielectric liner, the second dielectric liner separating the field plate from the vertical drift region and having a second thickness less than the first thickness.
地址 Dallas TX US