发明名称 Process of fabricating an integrated circuit die package having a plurality of pins
摘要 A process for manufacturing a modular multi-pin package for an integrated circuit die is formed of standardized parts and a redesigned, integrated circuit specific circuit substrate possessing a design pattern for providing electrical connection between die pads and output pins. The substrate includes a pattern of electrically conductive traces each terminating in a die pattern at an interior portion of the substrate and terminating in a pattern of pin connecting pads at a peripheral portion of the substrate. A pin holding frame is formed with a plurality of holes in which are inserted a selected number and pattern of package terminal pins, each having a shank protruding outwardly from the pin holder for connection to external circuits or components and each having an inner head pressed against one of the pin connecting pads of the substrate circuit traces. A conductive epoxy may be interposed between the pin heads and the substrate pin connecting pads to ensure electrical contact, and a dielectric gas impermeable adhesive may be employed to secure the pin holder frame to the substrate. A die is inserted through a central aperture of the pin holder frame for attachment to the substrate by connecting the die pads to the die connecting ends of the substrate circuit. The package is completed by bonding a gas impermeable lid of metal or a transparent material to the pin holder frame to cover the opening of the frame and seal the die within the package.
申请公布号 US5872026(A) 申请公布日期 1999.02.16
申请号 US19970916025 申请日期 1997.08.21
申请人 LSI LOGIC CORPORATION 发明人 PASCH, NICHOLAS F.
分类号 H01L21/50;H01L23/057;H01L23/498;H01L23/538;(IPC1-7):H01L21/52;H01L21/58;H01L21/60 主分类号 H01L21/50
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