| 摘要 |
This image-capture device has an image-capture unit, a reference signal generation unit, m row AD conversion units (where m is an integer of two or greater), and a plurality of row delay units. Each of the plurality of row delay units is distributed to two or more, but less than m, of the row AD conversion units. The plurality of row delay units have a first delay circuit connected to n first delay units (where n is an integer of two or greater) for delaying signals. Any one of the n first delay units receives the input of a reference clock based on a first clock. The first delay circuit generates a plurality of first delay clocks. The row AD conversion units have a comparator, a latch unit, and a counter. The comparator compares the image signal and the reference signal, and outputs a control signal corresponding to the comparison result. The latch unit has a plurality of latch circuits. The plurality of latch circuits latch the plurality of first delay clocks on the basis of a state conversion of the control signal. |
