Semiconductor memory device with EEPROM in trench with polysilicon/metal contacting to source and drain in virtual ground type array

摘要

Provided is a semiconductor memory device wherein nonvolatile memory elements are arranged in a matrix configuration, each of the memory elements having a field effect transistor including a floating gate, an interlayer insulating film and a control gate electrode which are stacked on an insulating film covering a semiconductor substrate, and a source region and a drain region which are respectively formed in the semiconductor substrate on both sides of the gate electrode, the floating gate, interlayer insulating film and control gate electrode being formed in a recess provided in the semiconductor substrate. The semiconductor device of such a structure is reduced in size and highly integrated with its high-performance characteristics maintained.