发明名称 Method of producing a microelectronic device in a monocrystalline semiconductor substrate with isolation trenches partially formed under an active region
摘要 A method of producing a microelectronic device in a substrate including a first semiconductor layer, a dielectric layer and a second monocrystalline semiconductor layer, the method including: etching a trench through the first semiconductor layer and the dielectric layer, and such that the trench delimits one active region of the microelectronic device; chemical vapor etching the second semiconductor layer, at a level of a bottom wall of the trench, according to at least two crystalline planes of the second semiconductor layer such that an etched part of the second semiconductor layer extends under a part of the active region; filling the trench and the etched part of the second semiconductor layer with a dielectric material.
申请公布号 US9396984(B2) 申请公布日期 2016.07.19
申请号 US201214425977 申请日期 2012.05.09
申请人 Commissariat a l'energie atomique et aux energies alternatives 发明人 Vinet Maud;Loubet Nicolas;Wacquez Romain
分类号 H01L21/00;H01L21/762;H01L21/311;H01L29/04;H01L29/06;H01L21/8234;H01L21/3065 主分类号 H01L21/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A method of producing a microelectronic device in a substrate including a first semiconductor layer disposed on a dielectric layer, the dielectric layer being disposed on a second semiconductor layer comprising at least a monocrystalline semiconductor, the method comprising: etching a trench through the first semiconductor layer and the dielectric layer such that a bottom wall of the trench is formed by a part of a top face of the second semiconductor layer which is in contact with the dielectric layer, and such that the trench delimits, in the first semiconductor layer, at least one active region of the microelectronic device; chemical vapor etching the second semiconductor layer, at a level of the bottom wall of the trench, according to at least two crystalline planes of the second semiconductor layer, one of the two crystalline planes corresponding to a crystalline orientation of the second semiconductor layer, such that an etched part of the second semiconductor layer extends under a part of the active region; filling the trench and the etched part of the second semiconductor layer with a dielectric material, forming an isolation trench surrounding the active region and including, at a level of the etched part of the second semiconductor layer, at least one portion of the dielectric material extending under a part of the active region.
地址 Paris FR