| 发明名称 |
Method and system of jitter compensation |
| 摘要 |
The present invention relates to sigma-delta modulators, SigmaDelta modulators, and phase locked loops. Especially, it relates to jitter compensation in SigmaDelta-controlled fractional-N frequency synthesizers. Jitter compensation is introduced by means of a variable delay line.
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| 申请公布号 |
US2009072913(A1) |
申请公布日期 |
2009.03.19 |
| 申请号 |
US20040550568 |
申请日期 |
2004.03.12 |
| 申请人 |
EIKENBROEK JOHANNES WILHELMUS |
发明人 |
EIKENBROEK JOHANNES WILHELMUS THEODORUS |
| 分类号 |
H03L7/06;H03L;H03L7/081;H03L7/197 |
主分类号 |
H03L7/06 |
| 代理机构 |
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