Retrieving instructions of a single branch, backwards short loop from a virtual loop buffer

摘要

A method, system, and computer program product for instruction fetching within a processor instruction unit, utilizing a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. During instruction fetch, modified instruction buffers coupled to an instruction cache (I-cache) temporarily store instructions from a single branch, backwards short loop. The modified instruction buffers may be a loop buffer, one or more virtual loop buffers, and/or an instruction buffer. The instruction fetch within the instruction unit of a processor retrieves the instructions for the short loop from the modified buffers during the loop cycles of the single branch, backwards short loop, rather than from the instruction cache.

主权项

1. A processor comprising:
one or more execution units; an instruction cache having instructions stored therein for execution by one or more execution units; and an instruction unit circuit coupled to the one or more execution units and which provides instructions fetched from the instruction cache to the one or more execution units for execution, wherein the instruction unit circuit comprises a plurality of physical instruction buffers, and wherein the instruction unit circuit is configured to:
detect a presence of a single branch, backwards short loop within a stream of fetched instructions;add two virtual loop buffer subdivisions within each of four physical instruction buffers of the plurality of physical instruction buffers, wherein each virtual loop buffer subdivision is capable of storing four instructions;determine whether the number of instructions in the single branch, backwards short loop is greater than the capacity of a local loop buffer of the instruction unit circuit, wherein the local loop buffer is a virtual loop buffer that is physically distributed substantially equally across the plurality of physical instruction buffers, and wherein the virtual loop buffer is a plurality of virtual loop buffers that includes the two virtual loop buffer subdivisions within each of four physical instruction buffers;in response to determining that the number of instructions in the single branch, backwards short loop is not greater than the capacity of the local loop buffer:
determine a number of loop cycles of the single branch, backwards short loop; andtemporarily buffer the single branch, backwards short loop in the local loop buffer, wherein the instructions of the single branch, backwards short loop are distributed substantially equally across each virtual loop buffer subdivision of the four physical instruction buffers based on the number of instructions in the single branch, backwards short loop, and wherein a portion of each physical instruction buffer is not allocated to the virtual loop buffer; andretrieve the instructions of the single branch, backwards short loop from the local loop buffer for completing the single branch, backwards short loop by bypassing the instruction cache until all of the loop cycles of the single branch, backwards short loop have completed, wherein during the single branch, backwards short loop each instruction that is processed from the local loop buffer is rotated by an instruction decode and dispatch unit back into the local loop buffer.