发明名称 COMMUNICATION APPARATUS AND MEMORY CONTROL METHOD
摘要 A controller can perform a first write process, in which the controller confirms a state of a buffer memory in response to a first interrupt signal, and if the buffer memory has a free space where next transmission data can be written, writes the next transmission data in the buffer memory. Further, the controller can perform a second write process, in which the controller confirms the state of the buffer memory in response to completion of the first write process, and if the buffer memory has the free space, writes the next transmission data in the buffer memory. The controller performs a new one of the first write process after having performed write of the transmission data in the second write process.
申请公布号 US2016266846(A1) 申请公布日期 2016.09.15
申请号 US201514846328 申请日期 2015.09.04
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HORIGUCHI Tomoya
分类号 G06F3/06;H04B5/00;H04L12/861 主分类号 G06F3/06
代理机构 代理人
主权项 1. A communication apparatus comprising: a transmission device that reads transmission data to be transmitted to a communication counterpart apparatus from a buffer memory in which the transmission data is written, and transmits the transmission data to the communication counterpart apparatus; and a controller that writes the transmission data in the buffer memory, wherein the transmission device outputs a first interrupt signal to the controller in response to transmission completion of the transmission data, and the controller can perform a first write process in which the controller confirms a state of the buffer memory in response to the first interrupt signal, and if the buffer memory has a free space where next transmission data can be written, writes the next transmission data in the buffer memory at least once, and a second write process in which the controller confirms the state of the buffer memory in response to completion of the first write process, and if the buffer memory has the free space, writes the next transmission data in the buffer memory, and wherein the controller performs a new one of the first write process after having performed write of the transmission data in the second write process.
地址 Tokyo JP