METHOD OF SOURCE/DRAIN HEIGHT CONTROL IN DUAL EPI FINFET FORMATION

摘要

A method of forming field effect transistors (FETs), and forming integrated circuit (IC) chip including the FETs. Gates are formed on said semiconductor fins to define multi fin field effect transistors (FinFETs). Dielectric sidewalls on fins protect the sidewalls while the surface is damaged intentionally, e.g., with an implant that leaves source/drain junctions undisturbed. After removing the dielectric sidewalls semiconductor material is grown epitaxially on the sidewalls with the damage retarding growth on the surface. The epi-growth bridges between fins in the same FET. After the damage is repaired, chip processing continues normally.

主权项

1. A method of forming fin field effect transistors (FinFETs), said method comprising:
forming fins on a semiconductor wafer; forming gates defining field effect transistors (FETs) on said fins, conduction regions being exposed in said fins at both ends of each gate, at least one FET including a plurality of said fins; forming dielectric sidewalls on said semiconductor wafer, said dielectric sidewalls forming on sidewalls at said conduction regions of each fin; damaging the upper surface of said conduction regions in each of said fins; epitaxially growing semiconductor material (epi) on said fin sidewalls, the fin damage retarding epi growth on said fin upper surfaces, epi merging between fins in each of said plurality of fins; and repairing damaged fin upper surfaces.