发明名称 |
SYSTEM ON CHIP AND VERIFICATION METHOD THEREOF |
摘要 |
A verification method of a system on chip includes receiving a test generator and an exception handler; generating, by the test generator, a test program including an exception-causing instruction based on a test template; executing a first instruction at a first operating state as the test program is executed; stopping the execution of the test program and performing a fixed instruction sequence included in the exception handler when the exception-causing instruction is executed during the execution of the test program; and resuming the test program from a second instruction at a second operating state set after the fixed instruction sequence is performed, the second instruction corresponding to an address adjacent to an address of the exception-causing instruction. |
申请公布号 |
US2016371092(A1) |
申请公布日期 |
2016.12.22 |
申请号 |
US201615257063 |
申请日期 |
2016.09.06 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
PARK Sung-Boem;PARK Jin-Sung;CHO Ara |
分类号 |
G06F9/38;G06F9/30 |
主分类号 |
G06F9/38 |
代理机构 |
|
代理人 |
|
主权项 |
1. (canceled) |
地址 |
Suwon-si KR |