Elapsed Cycle Timer in Last Branch Records

摘要

A processing device implementing an elapsed cycle timer in last branch records (LBRs) is disclosed. A processing device of the disclosure includes a last branch record (LBR) counter to iterate with each cycle of the processing device. The processing device further includes at least one register communicably coupled to the LBR counter, the at least one register to provide an LBR structure comprising a plurality of LBR entries. An LBR entry of the plurality of LBR entries includes an address instruction pointer (IP) of a branch instruction executed by the processing device, an address IP of a target of the branch instruction, and an elapsed time field that stores a value of the LBR counter in response to creation of the LBR entry.

主权项

1. A processing device, comprising:
a last branch record (LBR) counter to iterate with each cycle of the processing device; and at least one register communicably coupled to the LBR counter, the at least one register to provide an LBR structure comprising a plurality of LBR entries, wherein an LBR entry of the plurality of LBR entries comprises:
an address instruction pointer (IP) of a branch instruction executed by the processing device;an address IP of a target of the branch instruction; andan elapsed time field that stores a value of the LBR counter in response to creation of the LBR entry.