Detection arrangement

摘要

There is provided a detection arrangement for detecting an attack to internal signals in a semiconductor device. The detection arrangement comprises a first input terminal, a second input terminal, and a comparison unit. The first input terminal is adapted to receive a first signal being indicative for a signal at a first stage of a driver of the semiconductor device, the driver being capable to drive signals internally to the semiconductor device. The second input terminal is adapted to receive a second signal being indicative for a signal at a second stage of the driver of the semiconductor device. The comparison unit is adapted to compare the first signal and the second signal and to determine a time period during which the signals are equal, wherein the determined time period is indicative for a potential attack, if the determined time period is above a predefined threshold.

主权项

1. A detection arrangement for detecting an attack to internal signals in a semiconductor device, the detection arrangement comprising:
a first input terminal connected to an internal node of a driver of the semiconductor device, a second input terminal connected to an output node of the driver of the semiconductor device, and a comparison unit including:
circuitry including at least one logic comparator configured to generate a first equality signal based upon a comparison of a first signal at the first input terminal to a second signal at the second input terminal, and including a load capacitance configure with a capacitance value that varies in response to the first and second signals during the attack,a filtering unit configured to filter the first equality signal of the at least one logic comparator to generate, in response to a time period of the equality signal exceeding a predefined threshold indicative of a potential attack, an alarm signal, wherein the time period is a function of the capacitance value.