| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to minimize chip size, to reduce contact resistance and to prevent short between a contact and a gate by using borderless contact, SAC(Self-Aligned Contact) and salicide processes. CONSTITUTION: A stacked structure including gates(13A,13B) and sacrificial layers is formed on a substrate(10) with a field oxide layer(11). A gate spacer(16) is formed at both sidewalls of the stacked structure. A source/drain region is formed in the substrate. By removing the sacrificial layer, the gate spacer is protruded from the gate. Metal silicide layers(17A,17B,17C,17D) are formed on the gates and the source/drain region. A nitride layer(18) is formed on the resultant structure to cover the protrudent gate spacer. An insulating layer(19) for planarizing is formed on the resultant structure. By selectively etching the insulating layer using SAC and borderless contact processes, the nitride layer is exposed. By removing the nitride layer, contact holes(20C,20D,20B) are formed.
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