| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor element, which can selectively decrease the critical dimension (CD) of a peripheral region while maintaining the CD of a cell region uniform when forming a gate pattern. <P>SOLUTION: A method of manufacturing a semiconductor element comprises: a step of forming a conductive material layer for a gate on a substrate including a cell region and a peripheral region; a step of forming hard mask patterns on the conductive material layer; a step of forming a mask pattern for exposing the peripheral region on the entire structure having the hard mask patterns in the cell region; a step of trimming the hard mask patterns in the peripheral region; a step of removing the mask pattern; and a step of etching the conductive material layer by using the hard mask patterns to form gate patterns. <P>COPYRIGHT: (C)2008,JPO&INPIT |
